Project Title: Programming Models for Parallel Processing (1996-1998)

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Welcome to the home page for Project.

Research activities:

• Programming models
• Instruction Level Parallel Processors
• VLIW and Superscalar Processors
• Automatic design of Parallel Algorithms
• Mapping Algorithms into VLSI Systolic Arrays

Workshops

• Workshop "Programming models" held on Nov. 25^th 1997, 9-12h am.
• Workshop "Pipelined Processors" to be held on Dec. 2^nd 1997, 9-12h am.
• Workshop "Instruction Level Parallel Processors" to be held on Dec 9^th and Dec 16^th 9-12h am.
• Workshop "VLIW and Superscalar Processors" to be held on Dec 23^th and Dec 30^th 9-12h am.

Please visit Parallel Processing Lab.

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For problems or questions regarding this web contact marjan@robig.pmf.ukim.edu.mk.
Last updated: April 02, 1999.